The present invention relates to an improved substrate design for application in integrated circuitry. Specifically, the present invention relates to a substrate design for attaching and interconnecting electrical and electronic devices, especially integrated circuit chips.
Current multi-chip circuitry design requires attachment to a substrate of electrical and electronic devices, oftentimes in the form of integrated circuit (I.C.) chips. The substrate, which includes an interconnect wiring structure and a support therefor, electrically connects the chips. Presently known attachments involve the attachment of the chips directly to the interconnect, thus forming a multilayer structure of support-interconnect-chips.
The interconnect surface serves a number of services in addition to chip attachment. For example, the interconnect surface provides for test pads for testing the attached circuitry and underlying wiring, for engineering change pads for rewiring the circuitry, for termination resistors, for repair to the circuitry, and so on. These different functions and their attendant structures compete with chip attachment structures for room on the interconnect. As a result, the chip packing density is less than optimal because space must be left between the chips for these other various structures. As more and more structure is required on the interconnect surface, the chip density declines. Optimally, the chip density should approach 100% in a planar multi-chip module.
Accordingly, there exists a need for a substrate structure which is capable of supporting the many structures and functions required of such substrates, while optimizing chip density.